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      separation by implantation of oxygen SOI waferSIMOX

      基本解釋SOI 晶圓

      網絡釋義

      1)separation by implantation of oxygen SOI waferSIMOX,SOI 晶圓2)SOI wafer,SOI晶圓3)bonding silicon on insulator wafer,矽絕緣體(SOI) 接合晶圓4)SOI,SOI5)Silicon on insulator,SOI6)wafer,晶圓7)Wafer bumping,晶圓凸起8)300mm wafer line,300mm晶圓線9)wafer fabrication,晶圓加工10)(111)silicon,(111)硅晶圓

      用法和例句

      The quality of SOI wafer mainly depends on the structure of Top-Si as well as BOX(Buried Oxide).

      SOI晶圓材料正在成為制備IC芯片的主要原材料。

      Study of the Single-Event Effect of SOI NMOSFET by 3-D Simulation;

      SOI NMOSFET單粒子效應的3-D模擬

      The Design of Three-Axis Accelerometer Based on SOI;

      基于SOI的三軸壓阻微加速度計的設計

      Simulation experiment of tolerance of irradiation about domestic SOI 1750A microprocessor;

      國產SOI 1750A微處理器抗輻射效應模擬試驗

      An ultracompact 3 dB coupler is designed and fabricated in silicon on insulator,based on 1×2 line tapered multimode interference (MMI) coupler.

      采用線錐形結構 ,在 silicon- on- insulator(SOI)材料上設計并實現(xiàn)了一種新的緊縮型 3- d B多模干涉耦合器(MMI) 。

      A 4×4 area modulation silicon on insulator (SOI) multimode interference coupler optical switch, composed of four cascaded 2×2 area modulation optical switches, has been designed.

      根據(jù)區(qū)域調制多模干涉耦合器光開關的工作原理 ,以 2× 2區(qū)域調制多模干涉光開關為基礎 ,采用級聯(lián)的方式設計了 4× 4區(qū)域調制多模干涉SOI光波導開關。

      Silicon on insulator(SOI) structure, as a very large scale integrated circuit(VLSI) wafer, has attractive features such as radiationhardening, no parasitic capacitance and latchup effect.

      絕緣體上生長的薄單晶硅膜 (SOI)具有良好的橫向絕緣、抗輻照、無鎖存效應和無寄生電容 ,并能有效地提高硅集成電路的速度和集成度 ,在深亞微米 VL SI技術中 ,具有很大的優(yōu)勢和潛力。

      Evolution of Wafer-Surface Preparation for Semiconductor Industry;

      半導體產業(yè)中晶圓片表面處理的發(fā)展

      The structural design of the wafer expansion device was put forward.

      該裝置可完成片盒、內圈和外圈的輸入和取片動作,實現(xiàn)擴晶過程張緊力的調節(jié)控制、分離晶圓和襯架、排出空片盒和廢棄的襯架等。

      We present a FEM method for forecasting the suitable pressure on the retaining ring,which is critical in manufacturing good quality wafers.

      隨著晶圓直徑的增加,在CMP加工過程中,晶圓邊緣容易出現(xiàn)"過磨(over-grinding)"現(xiàn)象,降低了平坦度和晶圓利用率。

      According to the characteristics,the modeling problem using Petri net for cluster tools in wafer fabrication was studied.

      晶圓加工過程中使用的模塊化組合設備具有可重構性,設備配置的復雜程度由晶圓加工工藝方案決定,針對這一特點,研究了晶圓加工系統(tǒng)的Petri網建模問題。

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